Design of an IDM-based determinant computing unit for a 130nm low power CMOS ASIC acoustic localization processor

Chacón-Rodríguez, Alfonso
Julián, Pedro
Rodríguez, Agustín
Cerdas-Robles, Roberto

2017-06-06T21:02:26Z

978-147998332-2

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A determinant computing circuit in floating point format has been designed and tested for use in a CMOS ASIC acoustic localization processor. The Internal Division Method (IDM) was used to implement the operation, employing a modified SRT radix-4 circuit for division operations. The unit was designed for VLSI implementation in a commercial 130nm low-power CMOS process, with an operation frequency of 100MHz. The algorithm employed is parallelizable for future prototypes, should a higher operation frequency be required.

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Research Subject Categories::TECHNOLOGY::Information technology::Computer science::Computer science; Circuit, CMOS, aritmética, FPGA; Circuitos; CMOS; Aritmética; FPGA;